Espressif Systems /ESP32-H2 /LEDC /CH5_GAMMA_WR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CH5_GAMMA_WR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH_GAMMA_DUTY_INC)CH_GAMMA_DUTY_INC 0CH_GAMMA_DUTY_CYCLE0CH_GAMMA_SCALE0CH_GAMMA_DUTY_NUM

Description

Ledc ch5 gamma ram write register.

Fields

CH_GAMMA_DUTY_INC

Ledc ch%s gamma duty inc of current ram write address.This register is used to increase or decrease the duty of output signal on channel %s.

1: Increase 0: Decrease.

CH_GAMMA_DUTY_CYCLE

Ledc ch%s gamma duty cycle of current ram write address.The duty will change every LEDC_CH%s_GAMMA_DUTY_CYCLE on channel %s.

CH_GAMMA_SCALE

Ledc ch%s gamma scale of current ram write address.This register is used to configure the changing step scale of duty on channel %s.

CH_GAMMA_DUTY_NUM

Ledc ch%s gamma duty num of current ram write address.This register is used to control the number of times the duty cycle will be changed.

Links

() ()